I last left with a puzzle on my mind. The VRMS and IRMS registered seemed to be reversed. Changing the load did not vary the IRMS register by rather the VRMS. I figured I had screwed something up in the register definition enumeration or some sort of cut and paster error.Tonight I went through the whole thing very carefully and found no fault with my code. I invoked a read on the IRMS register, captured it with a logic analyzer, and hand decoded it. Got the exact same thing from my code. I also noticed that the PEAK registers were affected by the appropriate parameter.<\/p>\n
As I wait for a reply from Analog Devices, I must assume that the datasheet has a typo in it and that the registers are reversed. Or since the pattern of I, V, I, V related registers would change, I assume that the die revision I have (0x03) has a bug in it.<\/p>\n
As long as I get positive confirmation back from Analog, it will be simple to swap the two register reads. If they insist that the part or document is not defective, I am not sure what to do!<\/p>\n
But a good thing happened tonight as a consequence of all the testing. I proved to myself that the zero crossing ISR had nothing to do with the reversal. Looking back over my old notes, it is certain that I noticed the reversal in the early days. At that time, I was only printing out the register number and not the text “VRMS”. I could easily have just assumed that the one that changed was the correct register.<\/p>\n","protected":false},"excerpt":{"rendered":"
I last left with a puzzle on my mind. The VRMS and IRMS registered seemed to be reversed. Changing the load did not vary the IRMS register by rather the VRMS. I figured I had screwed something up in the … Continue reading